Method and apparatus for performing bit-aligned permute

Registers – Records – Particular code pattern

Reexamination Certificate

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C235S487000

Reexamination Certificate

active

07014122

ABSTRACT:
A method and apparatus for performing bit-aligned permute are disclosed. A select register, a pair of data registers and a target register are provided. The entries of the select register is preloaded with a set of bit indices. Each of the bit indices points to a desired bit location within the data registers. The byte information stored in the data registers are then copied to the target register according to the bit indices within the select register.

REFERENCES:
patent: 5481685 (1996-01-01), Nguyen et al.
patent: 5805850 (1998-09-01), Luick
patent: 2002/0091916 (2002-07-01), Dowling

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