Three dimensional high aspect ratio micromachining

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S770000

Reexamination Certificate

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07045466

ABSTRACT:
Multi-level structures are formed in a semiconductor substrate by first forming a pattern of lines or structures of different widths. Width information on the pattern is decoded by processing steps into level information to form a MEMS structure. The pattern is etched to form structures having a first floor. The structures are oxidized until structures of thinner width are substantially fully oxidized. A portion of the oxide is then etched to expose the first floor. The first floor is then etched to form a second floor. The oxide is then optionally removed, leaving a multi-level structure. In one embodiment, high aspect ratio comb actuators are formed using the multi-level structure process.

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