Phase frequency detector

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By phase

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C327S012000

Reexamination Certificate

active

07053666

ABSTRACT:
Provided is a phase frequency detector for use in a phase locked loop (PLL) or a delay locked loop (DLL), the phase frequency detector including: an UP signal output unit having a first stage operated according to a reference clock delayed by a predetermined time and a reset signal, a second stage operated according to the reference clock and an output of the first stage, and an inverter for inverting an output of the second stage; a DOWN signal output unit having: a first stage operated according to an outer clock delayed by a predetermined time and the reset signal, a second stage operated according to the outer clock and an output of the first stage, and an inverter for inverting an output of the second stage; and a logic gate logically combining the output of the second stage of the UP signal output unit and the output of the second stage of the DOWN signal output unit to generate the reset signal, thereby a phase range of the input signal with which an effective control signal can be obtained is wide so that low power consumption and low noise characteristics can be obtained due to fast phase lock, low power consumption of a dynamic logic, and fast signal transmission.

REFERENCES:
patent: 5317283 (1994-05-01), Korhonen
patent: 5373255 (1994-12-01), Bray et al.
patent: 5592109 (1997-01-01), Notani et al.
patent: 5661419 (1997-08-01), Bhagwan
patent: 5736872 (1998-04-01), Sharma et al.
patent: 5896066 (1999-04-01), Katayama et al.
patent: 5963058 (1999-10-01), Thomas
patent: 6037806 (2000-03-01), Smith et al.
patent: 6157263 (2000-12-01), Lee et al.
patent: 6831485 (2004-12-01), Lee et al.
Mozhgan Mansuri, et al.; “Fast Frequency Acquisition Phase-Frequency Detectors for GSamples/s Phase-Locked Loops”; IEEE Journal of Solid-State Circuits, vol. 37, No. 10, Oct. 2003, pp. 1331-1334.
Sungjoon Kim, et al.; “A 960-Mb/s/pin Interface for Skew-Tolerant Bus Using Low Jitter PLL”; IEEE Journal of Solid-State Circuits, vol. 32, No. 5, May 1997, pp. 691-700.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Phase frequency detector does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Phase frequency detector, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Phase frequency detector will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3533441

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.