Semiconductor integrated circuit device having a common DRAM...

Details Semiconductor integrated circuit device having a common DRAM... Semiconductor integrated circuit device having a common DRAM...

2006-01-24

2006-01-24

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S230030, C365S189080, C365S219000

Reexamination Certificate

active

06990043

ABSTRACT:
A plurality of logic circuits access a DRAM block by way of an access circuit. The operation clock for the DRAM block is set at a higher frequency than the system clock for the logic circuits. Outputs of a first bit width from the logic circuits are subjected to serial/parallel conversion into data of a second bit width and the data is written into the DRAM block.

REFERENCES:
patent: 6219072 (2001-04-01), Tanaka et al.
patent: 6646939 (2003-11-01), Kwak
patent: 2003/0021175 (2003-01-01), Kwak
patent: 2003/0202383 (2003-10-01), Shiota et al.
patent: 11-102362 (1999-04-01), None
Hideo Ohwada, et al. “A Single-Chip Band-Segmented-Transmission OFDM Demodulator for Digital Terrestrial Television Broadcasting”, 2001 IEEE International Solid-State Circuits Conference, pp. 334-335, 462.
Toshiba Semiconductor Company, “Embedded DRAM technology” <http://www.semicon.toshiba.co.jp/prd/asic/index.html>.

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