Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2006-09-19
2006-09-19
Hjerpe, Richard (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S076000, C345S204000, C315S169300, C349S042000
Reexamination Certificate
active
07109966
ABSTRACT:
A CMOS circuit comprises a first transistor of P channel type, a second transistor of N channel type and a drive circuit for driving the first and second transistors. The drive circuit includes a time constant circuit having a first time constant utilizing a first gate input capacitance of the first transistor (parasitic capacitance between a gate and a source of the first transistor) and a second time constant utilizing a second gate input capacitance of the second transistor (parasitic capacitance between a gate and a source of the second transistor). Either one of the first and second time constants of the time constant circuit is selected by turning either one of the first and second transistors ON after the other transistor OFF, when the drive circuit receives a predetermined logic signal.
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Abe Shinichi
Fujisawa Masanori
Fatahi-yar M.
Hjerpe Richard
Mattingly ,Stanger ,Malur & Brundidge, P.C.
Rohm & Co., Ltd.
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