Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2006-01-24
2006-01-24
Smoot, Stephen W. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S762000, C257S767000, C257S768000
Reexamination Certificate
active
06989599
ABSTRACT:
A reliable semiconductor device is provided with a layered interconnect structure that may develop no problem of voids and interconnect breakdowns, in which the layered interconnect structure includes a conductor film and a neighboring film so layered on a semiconductor substrate that the neighboring film is in contact with the conductor film. In the device, the materials for the conductor film and the neighboring film are so selected that the difference between the short side, ap, of the rectangular unit cells that constitute the plane with minimum free energy of the conductor film and the short side, an, of the rectangular unit cells that constitute the plane with minimum free energy of the neighboring film, {|ap−an|/ap}×100=A (%) and the difference between the long side, bp, of the rectangular unit cells that constitute the plane with minimum free energy of the conductor film and the long side, bn, of the rectangular unit cells that constitute the plane with minimum free energy of the neighboring film, {|bp−bn|/bp}×100=B (%) satisfy an inequality of {A+B×(ap/bp)}<13. In this way, the diffusion of the conductor film is retarded.
REFERENCES:
patent: 4851895 (1989-07-01), Green et al.
patent: 5510651 (1996-04-01), Manier et al.
patent: 5674787 (1997-10-01), Zhao et al.
patent: 5824599 (1998-10-01), Schacham-Diamand et al.
patent: 6020266 (2000-02-01), Hussein et al.
patent: 6054331 (2000-04-01), Woo et al.
patent: 05-315336 (1993-11-01), None
patent: 6-238878 (1994-08-01), None
patent: 09-069522 (1997-03-01), None
patent: 10-022274 (1998-01-01), None
patent: 10229084 (1998-08-01), None
patent: 10-256251 (1998-09-01), None
patent: 10-284601 (1998-10-01), None
patent: 2001-505367 (2001-04-01), None
“Diffusion Barrier Between Copper and Silicon”, IBM Technical Disclosure Bulletin vol. 35 No. 1B, pp. 214-215 (Jun. 1992).
Iwasaki Tomio
Miura Hideo
Antonelli, Terry Stout and Kraus, LLP.
Hitachi , Ltd.
Smoot Stephen W.
LandOfFree
Semiconductor device with layered interconnect structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device with layered interconnect structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with layered interconnect structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3526963