Dynamic complexity prediction and regulation of MPEG2...

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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C375S240000, C375S240010, C375S240120, C375S240290

Reexamination Certificate

active

06925126

ABSTRACT:
A method and system of regulating the computation load of an MPEG decoder in a video processing system are provided. The video processing system processes the header information of a compressed video data stream including a plurality of macroblocks with a motion vector associated therewith. Then, the computation load of each functional block of the MPEG decoder is adjusted according to predetermined criteria; thus, substantial computational overhead is desirably avoided.

REFERENCES:
patent: 5289276 (1994-02-01), Siracusa et al.
patent: 6011498 (2000-01-01), Wittig
patent: 6125147 (2000-09-01), Florencio et al.
patent: 6408096 (2002-06-01), Tan
patent: 0919952 (1998-05-01), None
patent: 0912063 (1998-10-01), None
patent: WO9912126 (1998-04-01), None

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