Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation
Reexamination Certificate
2005-06-28
2005-06-28
Kinkead, Arnold (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Tuning compensation
C331S025000, C331S00100A, C331S017000, C327S156000, C327S157000
Reexamination Certificate
active
06911868
ABSTRACT:
In a phase-locked loop (PLL) frequency synthesizer, a first frequency divider divides an output signal from a voltage-controlled oscillator by a first divider value. A second frequency divider divides a reference signal by a second divider value. A charge pump increases a voltage level on a loop filter by injecting a charge pump current and decreases the voltage level on the loop filter by draining the charge pump current. A loop response control circuit adjusts the charge pump current. In particular, the first divider value may lie within one of a first plurality of ranges and/or the second divider value may lie within one of a second plurality of ranges. The charge pump current is adjusted based at least partially on which of the first plurality of ranges the first divider value lies within and/or which of the second plurality of ranges the second divider value lies within.
REFERENCES:
patent: 5142247 (1992-08-01), Lada et al.
patent: 5339050 (1994-08-01), Llewellyn
patent: 5420545 (1995-05-01), Davis et al.
patent: 5939949 (1999-08-01), Olgaard et al.
Kinkead Arnold
National Semiconductor Corporation
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