Semiconductor memory having storage cells storing multiple...

Details Semiconductor memory having storage cells storing multiple... Semiconductor memory having storage cells storing multiple...

2005-08-30

2005-08-30

Elms, Richard (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185260, C438S257000, C438S266000

Reexamination Certificate

active

06937525

ABSTRACT:
A multiple-bit transistor includes P type semiconductor including a projection, a gate insulation layer, a pair of N type source/drain regions, tunnel insulation layers, a pair of floating gates, inter-polycrystalline insulation layers, and a control gate. The root portion of the projection, which is defined by a straight line virtually connecting the source/drain regions, is higher in the concentration of the P type impurity than the other portion. A potential difference for write-in is set up between the source/drain regions while a write voltage is applied to the control gate, thereby causing electrons to be ballistically injected into at least one of the floating gates.

REFERENCES:
patent: 6133098 (2000-10-01), Ogura et al.
patent: 6154392 (2000-11-01), Patti
patent: 6323088 (2001-11-01), Gonzalez et al.
patent: 2002/0014666 (2002-02-01), Ohmi et al.
patent: 3249812 (2002-01-01), None
patent: 3283872 (2002-05-01), None
patent: 2002208648 (2002-07-01), None

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