Method of manufacturing a memory integrated circuit device

Details Method of manufacturing a memory integrated circuit device Method of manufacturing a memory integrated circuit device

2005-11-29

2005-11-29

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Reexamination Certificate

active

06969663

ABSTRACT:
A method of manufacturing a memory integrated circuit device including a memory cell region and a peripheral circuit region on a semiconductor substrate includes the steps of (a) forming a first groove in the memory cell region on the semiconductor substrate; (b) forming a second groove in the peripheral circuit region on the semiconductor substrate; and (c) forming a memory cell transistor in self-alignment with the first groove in the memory cell region and forming a peripheral circuit transistor in the peripheral circuit region using the second groove as an isolation groove. The steps (a) and (b) are performed simultaneously.

REFERENCES:
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patent: 6667507 (2003-12-01), Shirota et al.
patent: 8-186183 (1996-07-01), None

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