Video signal processing circuit for compressed picture insertion

Details Video signal processing circuit for compressed picture insertion Video signal processing circuit for compressed picture insertion

1991-05-28

1992-08-11

Chin, Tommy P.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358181, 358 22, H04N 5262, H04N 5272

Patent

active

051384558

ABSTRACT:
A video signal processing circuit for providing a compressed picture insertion function in a television receiver, whereby a compressed-size picture expressed by one video signal is displayed as an insert within a full-size picture that is expressed by another video signal, by demodulating and combining the video signals, which can be of respectively different television standards, such as the PAL and MUSE standards. The circuit utilizes only one demodulator circuit for one video signal and two demodulator circuits for the other signal. When one of the video signals is in accordance with a broadcast standard such as the MUSE standard, which requires a large-scale demodulator circuit, a significant reduction in overall circuit scale is achieved by comparsion with the prior art, in which two demodulator circuits are required for each of the video signals.

REFERENCES:
patent: 4665438 (1987-05-01), Miron
patent: 4746983 (1988-05-01), Hakamada
patent: 4750039 (1988-06-01), Willis

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