Non-volatile semiconductor memory device, method for...

Details Non-volatile semiconductor memory device, method for... Non-volatile semiconductor memory device, method for...

2005-06-07

2005-06-07

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185110, C365S185220

Reexamination Certificate

active

06903981

ABSTRACT:
After execution of sub-block erase (S2) for partly erasing a memory cell block, sub-block erase verify read is executed (S4). As a result of the sub-block erase verify read, if the sub-block erase is completed, then terminate the sub-block erase (S5). If otherwise the sub-block erase is not completed yet, then perform over-program verify read (S6) to thereby determine whether the cause of an event that a sub-block erase-verify result becomes “Fail” due to the deficiency of erase or the presence of an over-programmed cell or cells. If the result of such over-program verify read is “Pass,” then repeat execution of the sub-block erase verify read (S2). When the over-program verify read (S6) is “Fail,” output a Fail result and then complete the operation (S8).

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patent: 5602789 (1997-02-01), Endoh et al.
patent: 5627782 (1997-05-01), Tanaka et al.
patent: 5691941 (1997-11-01), Imamiya et al.
patent: 7-287989 (1995-10-01), None
patent: 8-153398 (1996-06-01), None

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