Shift register and image display apparatus using the same

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S055000, C345S056000, C345S099000, C345S100000, C345S103000, C327S140000, C327S141000, C327S143000, C327S333000, C326S039000, C326S040000, C326S080000, C377S064000

Reexamination Certificate

active

06909417

ABSTRACT:
A level shifter13is provided for each of SR flip flops F1constituting a shift register11.The level shifter13increases a voltage of a clock signal CK. This arrangement reduces a distance for transmitting a clock signal whose voltage has been increased, as compared with a construction in which a voltage of a clock signal is increased by a single level shifter and the signal is transmitted to each of the flip flops; consequently, a load capacity of the level shifter can be smaller. Furthermore, each of the level shifters is operated during a pulse output of the previous level shifter13,and the operation is suspended at the end of the pulse output. Thus, the level shifters13can operate only when it is necessary to apply a clock signal CK to the corresponding SR flip flop F1.As a result, even when an amplitude of a clock signal is small, it is possible to reduce power consumption of the shift resister under normal operation.

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