Semiconductor integrated circuit device with nitride barrier lay

Details Semiconductor integrated circuit device with nitride barrier lay Semiconductor integrated circuit device with nitride barrier lay

1991-09-05

1992-08-11

Jackson, Jr., Jerome

H01L 2946

Patent

active

051384256

ABSTRACT:
The infiltration of an impurity, such as phosphorus or boron, from a lower layer or interconnect into a higher layer or interconnect can be prevented without sacrificing the established high resistance characteristics of a formed high resistance region in the latter through the employment of a thin nitride film of an appropriate material and thickness positioned at the interface between the lower layer and the high resistance region. This technique minimizes any detrimental shortening of the high resistance region formed in such a layer or interconnect making it suitable for increased density and higher levels of integration of semiconductor devices.

REFERENCES:
patent: 4829363 (1989-05-01), Thomas et al.
patent: 4855798 (1989-08-01), Imamura et al.
patent: 4887146 (1989-12-01), Hinode
patent: 4903096 (1990-02-01), Masuoka et al.
patent: 4935804 (1990-06-01), Ito et al.
T. Ohzone et al., "Ion-Implanted Thin Polycrystalline-Silicon High-Value Resistors for High-Density Poly-Load Static RAM Applications", IEEE Trans. on Electron Devices, vol. ED-32(9), pp. 1749-1756, Sep. 1985.

Affiliated with

Also associated with

Rating

Semiconductor integrated circuit device with nitride barrier lay does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor integrated circuit device with nitride barrier lay, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit device with nitride barrier lay will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-350760