Oscillation state discrimination circuit and oscillation...

Details Oscillation state discrimination circuit and oscillation... Oscillation state discrimination circuit and oscillation...

2005-08-16

2005-08-16

Mis, David (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

With reference oscillator or source

C331S00100A, C331S064000, C331S158000, C331SDIG002

Reexamination Certificate

active

06930559

ABSTRACT:
An oscillation control circuit comprising a PLL circuit and a phase-locked state discrimination circuit is adapted to an oscillation circuit that performs oscillation to produce an oscillation signal (CKX) when supply voltage is applied thereto. The PLL circuit produces a clock signal (CKP) whose frequency is a multiple of the frequency of the oscillation signal, wherein it controls the clock signal to be synchronized with the oscillation signal in phase. The phase-locked state discrimination circuit discriminates whether or not the PLL circuit is placed in a phase-locked state on the basis of a phase relationship between the oscillation signal and clock signal. Based on a discrimination result, a damping resistance adapted to the oscillation circuit is switched over. That is, the damping resistance (Rd) is reduced to cope with an unstable state of oscillation; then, it is restored to an original resistance thereof when oscillation is certainly stabilized.

REFERENCES:
patent: 6154097 (2000-11-01), Yoshioka
patent: 8065049 (1996-03-01), None
patent: 0927717 (1997-01-01), None

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