Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2005-02-01
2005-02-01
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular connection
C365S185120, C365S185110, C365S185270
Reexamination Certificate
active
06850439
ABSTRACT:
A non-volatile semiconductor memory device includes: a memory cell array having NAND strings arranged therein, each NAND string having a plurality of electrically rewritable and non-volatile memory transistors connected in series; and an erase/write/read control circuit configured to perform erasing, writing and reading of the memory cell array, wherein at least one memory transistor within each NAND string of the memory cell array is controlled as a block separation transistor for dividing the memory cell array into a plurality of blocks each serving as a unit of data erasure.
REFERENCES:
patent: 6295227 (2001-09-01), Sakui et al.
patent: 6411548 (2002-06-01), Sakui et al.
patent: 11-176177 (1999-07-01), None
patent: 2000222895 (2000-08-01), None
patent: 2002026153 (2002-01-01), None
Kabushiki Kaisha Toshiba
Tran Andrew Q.
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