Method and apparatus for reducing power consumption due to...

Details Method and apparatus for reducing power consumption due to... Method and apparatus for reducing power consumption due to...

2005-11-29

2005-11-29

Zweizig, Jeffrey (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

Reexamination Certificate

active

06970034

ABSTRACT:
One embodiment of the present invention provides a system that achieves low gate leakage current in an integrated circuit during sleep mode. Upon entering sleep mode, the system reduces the power supply voltage applied to the integrated circuit to a low voltage level, wherein the low voltage level is low enough to provide a low gate leakage current, but is high enough to maintain state in the integrated circuit.

REFERENCES:
patent: 5274601 (1993-12-01), Kawahara et al.
patent: 2002/0149036 (2002-10-01), Yabe
patent: 2002/0179940 (2002-12-01), Osada et al.
patent: 2003/0062948 (2003-04-01), Notani et al.
patent: 2003/0102904 (2003-06-01), Mizuno et al.

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