Low temperature microelectronic die to substrate interconnects

Details Low temperature microelectronic die to substrate interconnects Low temperature microelectronic die to substrate interconnects

2005-02-22

2005-02-22

Ngo, Hung V. (Department: 2831)

Metal fusion bonding

Process

Plural joints

C228S234100

Reexamination Certificate

active

06857557

ABSTRACT:
Methods are provided for interconnecting two electronic components having surface mount technology interconnects. In one embodiment, a reflowable electrically conductive first interconnect material is reflowed onto the land pads of a microelectronic die. A reflowable electrically conductive second interconnect material is reflowed between the first interconnect material and corresponding bond pads of a carrier substrate at a temperature below the melting temperature of the first interconnect material. The gap between the microelectronic device and the carrier substrate is provided with underfill material. The first and second interconnect materials are reflowed at or above the reflow temperature of the first interconnect material creating a hybrid material having a melting temperature higher than the second interconnect material. The interconnections take place at various stages of microelectronic device and package fabrication at various temperatures to minimize the detrimental effects of thermal and structural loading in the land pad region.

REFERENCES:
patent: 5147084 (1992-09-01), Behun et al.
patent: 5371328 (1994-12-01), Gutierrez et al.
patent: 6543674 (2003-04-01), Lee et al.
patent: 6546620 (2003-04-01), Juskey et al.
“Advanced IC Interconnect . . . ”; Shi Frank G.; Final Report '98-99 for MICRO Project 99-107; U of C, Irvine, CA.
“P-TSLP-2-1 / P-TSLP —3-1 . . . ”; Internet publication; Infection Technologies AG; www.infineon.com; Germany; Dec. 20, 2002*.
“Packaging Assessment of Porous Ultra . . . ”; Rasco et al.; International Sematech et al.; Dec. 20, 2002*.

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