Built-in self test for a counter system

Details Built-in self test for a counter system Built-in self test for a counter system

2005-12-13

2005-12-13

Wambach, Margaret R. (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Applications

Measuring or testing

C377S029000, C377S039000

Reexamination Certificate

active

06975696

ABSTRACT:
A self test for a counter system in an integrated circuit includes a clock coupled to counters in a plurality of counters. A first counter in the plurality of counters has a first counter output and a first counter rollover. A second counter in the plurality of counters has a second counter output, a second counter rollover less than the first counter rollover, and a second counter rollover signal that is active when the second counter has rolled over. A comparison circuit having inputs coupled to the first and second counter outputs, compares the first and second counter outputs to produce a counter error output signal. A latch latches the counter error output signal in response to the second counter rollover signal being inactive and the counter error output signal indicating a difference in the first and second counter outputs. Counters may be segmented to reduce a number of digits.

REFERENCES:
patent: 5473651 (1995-12-01), Guzinski et al.
patent: 6665367 (2003-12-01), Blair

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