Patent
1989-09-27
1992-02-04
Wojciechowicz, Edward J.
357 13, 357 238, 357 35, 357 36, 357 44, 357 52, 357 53, 357 57, 357 86, 357 89, H01L 2702
Patent
active
050863320
ABSTRACT:
A planar semiconductor device having a high breakdown voltage includes a semiconductor layer of a first conductivity type and a first semiconductor region of a second conductivity type selectively formed, together with the semiconductor layer, in the surface of the semiconductor layer forming a pn junction. The first semiconductor region is formed to have an impurity concentration higher than that of the semiconductor layer and therefore a resistivity higher than that of the semiconductor layer. A second semiconductor region of the second conductivity type having an impurity concentration lower than that of the first semiconductor region, is formed around and in contact with the first semiconductor region and together with the semiconductor layer constitutes a pn junction. A high resistance film is formed at least over the first semiconductor region and the second semiconductor region. A voltage is applied across the high resistance film to create a uniform electric field in the high resistance film.
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IEEE Trans. Electron Devices, vol. ED-23, No. 8, p. 826; T. Matsushita et al.; Aug. 1976.
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Baba Yoshiro
Koshino Yutaka
Nakagawa Akio
Watanabe Kiminori
Yamaguchi Yoshihiro
Kabushiki Kaisha Toshiba
Wojciechowicz Edward J.
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