Method and apparatus for buffering data within stations of a com

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3952002, 364239, 364DIG1, 36424295, G06F 1202

Patent

active

056029950

ABSTRACT:
Method and apparatus for buffering data packets in a data communication controller environment. In general, the communication controller is interfaceable with a host processor and includes a control unit for accessing a communication medium. Each data packet to be transmitted or received is assigned a unique packet number. Packet number assignment is carried out by a memory management unit which dynamically allocates to each assigned packet number, one or more pages in data packet buffer memory for the storage of the corresponding data packet. If requested storage space is unavailable at the time of request, the memory management unit will allocate a page or pages to an available packet number as the pages become free. Upon issuing the assigned packet number, the physical addresses of the allocated pages of buffer memory storage space are generated in a manner transparent to both the host processor and the control unit. With these physical addresses, a data packet can be accessed from buffer memory, in a simple manner. Upon completion of each data packet loading operation, the corresponding packet number is stored in a packet number queue maintained for subsequent retrieval in order to generate the physical addresses at which the corresponding data packet has been stored.

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Specification pamphlet of Intel Advanced CSMA/CD LAN Controller with 16-Bit Data Path, by Intel Corporation, Oct. 1988.

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