Circuit topology for high-speed memory access

Details Circuit topology for high-speed memory access Circuit topology for high-speed memory access

2005-08-16

2005-08-16

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

Transistors or diodes

C365S230030, C365S198000

Reexamination Certificate

active

06930904

ABSTRACT:
A circuit topology for high-speed memory access. In one embodiment, an electronic circuit includes a memory controller. The memory controller is coupled to a memory module by a first plurality of transmission lines. The memory module may include a second plurality of transmission lines coupled to the first plurality. The memory module further includes a first memory bank coupled to the second plurality of transmission lines and a third plurality of transmission lines. A second memory bank may be coupled to the third plurality of transmission lines. Each of the first, second, and third pluralities of transmission lines may be part of a common bus.

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