Nonvolatile semiconductor memory device which stores two...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S222000, C365S185200

Reexamination Certificate

active

06975543

ABSTRACT:
A nonvolatile semiconductor memory device includes nonvolatile memory cells each configured to store 2-bit information per memory cell, and a control circuit configured to verify with a first threshold one or more bits subjected to writing of new data and to verify with a second threshold one or more bits subjected to refreshing of existing data in a program operation that performs the writing of new data and the refreshing of existing data simultaneously with respect to the nonvolatile memory cells, the second threshold being lower than the first threshold.

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patent: 6201742 (2001-03-01), Hirai et al.
patent: 6240032 (2001-05-01), Fukumoto
patent: 2002/0141242 (2002-10-01), Noguchi et al.
patent: 2002/0181284 (2002-12-01), Kato
patent: 09306182 (1997-11-01), None
patent: 11-162182 (1999-06-01), None
patent: 2001-76496 (2001-03-01), None
patent: 2002184191 (2002-06-01), None
patent: 2002-324400 (2002-11-01), None
patent: 2003-051196 (2003-02-01), None

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