Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2005-06-14
2005-06-14
Cuneo, Kamand (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S761000
Reexamination Certificate
active
06906928
ABSTRACT:
The electronic component has a semiconductor chip mounted to a wiring board. The chip is bonded to the wiring board with adhesive strips that leave free a through-cutout, an additional cutout, and separating joints. The additional cutout provides for a plastic reservoir from which the separating joint between the adhesive strips is filled with plastic material.
REFERENCES:
patent: 4001870 (1977-01-01), Saiki et al.
patent: 4074342 (1978-02-01), Honn et al.
patent: 4365264 (1982-12-01), Mukai et al.
patent: 4618878 (1986-10-01), Aoyama et al.
patent: 4740700 (1988-04-01), Shaham et al.
patent: 4813129 (1989-03-01), Karnezos
patent: 4885126 (1989-12-01), Polonio
patent: 4902606 (1990-02-01), Patraw
patent: 5072520 (1991-12-01), Nelson
patent: 5104811 (1992-04-01), Berger et al.
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5148266 (1992-09-01), Khandros et al.
patent: 5180311 (1993-01-01), Schreiber et al.
patent: 5196371 (1993-03-01), Kulesza et al.
patent: 5420329 (1995-05-01), Zeiss
patent: 5455390 (1995-10-01), DiStefano et al.
patent: 5489749 (1996-02-01), DiStefano et al.
patent: 5491302 (1996-02-01), Distefano et al.
patent: 5508228 (1996-04-01), Nolan et al.
patent: 5583378 (1996-12-01), Marrs et al.
patent: 5604380 (1997-02-01), Nishimura et al.
patent: 5619017 (1997-04-01), Distefano
patent: 5661086 (1997-08-01), Nakashima et al.
patent: 5666270 (1997-09-01), Matsuda et al.
patent: 5679977 (1997-10-01), Khandros et al.
patent: 5749997 (1998-05-01), Tang et al.
patent: 5777379 (1998-07-01), Karavakis et al.
patent: 5783465 (1998-07-01), Canning et al.
patent: 5874782 (1999-02-01), Palagonia
patent: 5907785 (1999-05-01), Palagonia
patent: 6013946 (2000-01-01), Lee et al.
patent: 6091140 (2000-07-01), Toh et al.
patent: 6175159 (2001-01-01), Sasaki
patent: 6268650 (2001-07-01), Kinsman et al.
patent: 6284563 (2001-09-01), Fjelstad
patent: 6319564 (2001-11-01), Naundorf et al.
patent: 6630730 (2003-10-01), Grigg
patent: 196 39 934 (1998-04-01), None
patent: 04 280 458 (1992-10-01), None
patent: WO 98/50950 (1998-11-01), None
patent: WO 98/52225 (1998-11-01), None
patent: WO 98/55669 (1998-12-01), None
Anonymous: “Method of Testing Chips and Joining Chips to Substrates”,XP-000169195.
Patent Abstracts of Japan No. 20-00156435 A (Yoshitaka et al.), dated Jun. 6, 2000.
Hauser Christian
Reiss Martin
Cuneo Kamand
Dinh Tuan
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
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