Semiconductor memory devices and methods of fabricating...

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S145000, C365S189090

Reexamination Certificate

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06972980

ABSTRACT:
A semiconductor memory device includes a plate line driving portion having a control transistor connected to a plate line, a selection transistor in which a control electrode is connected to a word line and one end of a main current path is connected to a bit line, a ferroelectric capacitor connected to the other end of the main path of the selection transistor and the plate line, a first power supply connected to a sense amplifier and a precharge circuit, and a second power supply connected to a plate line driving portion, disposed as a separate system from the first power supply and insulated at the time of non-operation from the first power supply. The selection transistor is formed in a first semiconductor region and a main current path of the control transistor is formed in a second semiconductor region that is insulated through insulating films from the first region.

REFERENCES:
patent: 5671174 (1997-09-01), Koike et al.
patent: 6107656 (2000-08-01), Igarashi
patent: 6720596 (2004-04-01), Ohtsuka et al.
patent: 6856535 (2005-02-01), Madan
patent: 2000269444 (2000-09-01), None

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