Integrated circuit compensation for losses in signal lines due t

Details Integrated circuit compensation for losses in signal lines due t Integrated circuit compensation for losses in signal lines due t

1989-04-24

1992-08-11

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307303, H03K 17687, H03K 1716

Patent

active

051382032

ABSTRACT:
An integrated circuit including a plurality of circuits having the same input impedance, arranged at regular intervals, and applied with a signal from a single signal source, is disclosed in which the input impedance is substantially capacitive, the characteristic impedance of a signal line connected to the signal source for sending the signal to the circuits is given by Z.sub.0 .sqroot.L/C, where L indicates the inductance of the signal line per one circuit, and C indicates the combined capacitance of the parasitic capacitance of the signal line per one circuit and the input capacitance of each circuit, the signal line is terminated by a circuit element having impedance equal to the characteristic impedance Z.sub.0, and the signal source has output impedance equal to the characteristic impedance Z.sub.0.

REFERENCES:
patent: 4473798 (1984-09-01), Cedrone et al.
patent: 4564817 (1986-01-01), Gilson et al.
patent: 4616146 (1986-10-01), Lee et al.
patent: 4629909 (1986-12-01), Cameron
patent: 4649294 (1987-03-01), McLaughlin
patent: 4649295 (1987-03-01), McLaughlin
patent: 4675552 (1987-06-01), Wood
patent: 4682054 (1987-07-01), McLaughlin
patent: 4879480 (1989-11-01), Suzuki et al.
"A Monolithic 8-Bit A/D Converter With 120 Mhz Conversion Rate" by Inoue et al. IEEE JSSC, vol. Sc19, No. 6, Dec. 1984.
The ARRL Antenna Book, The American Radio Relay League, Inc., 1974, pp. 70-71.

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