Image processing apparatus

Facsimile and static presentation processing – Static presentation processing – Attribute control

Reexamination Certificate

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Details

C358S434000

Reexamination Certificate

active

06937364

ABSTRACT:
An image processing circuit is provided in which a clock signal is divided according to bits of data input thereto and supply or interruption of the divided clock signals is controlled according to the value of the input data. Therefore, it becomes possible to interrupt the clock signal which is to be supplied for a bit among the bits of the input data which is not used for a long period of time and reduce the power consumption of the circuit.

REFERENCES:
patent: 6396314 (2002-05-01), Roth
patent: 6437616 (2002-08-01), Antone et al.
patent: 6686802 (2004-02-01), Maeda
patent: 7-38776 (1995-02-01), None
patent: 9-200026 (1997-07-01), None
patent: 11-143570 (1999-05-01), None

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