Multi-state memory

Details Multi-state memory Multi-state memory

2005-02-15

2005-02-15

Nguyen, Viet Q. (Department: 2818)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185180, C365S185210, C365S205000, C365S203000, C365S189070, C365S189090, C365S210130

Reexamination Certificate

active

06856546

ABSTRACT:
Maximized multi-state compaction and more tolerance in memory state behavior is achieved through a flexible, self-consistent and self-adapting mode of detection, covering a wide dynamic range. For high density multi-state encoding, this approach borders on full analog treatment, dictating analog techniques including A to D type conversion to reconstruct and process the data. In accordance with the teachings of this invention, the memory array is read with high fidelity, not to provide actual final digital data, but rather to provide raw data accurately reflecting the analog storage state, which information is sent to a memory controller for analysis and detection of the actual final digital data.

REFERENCES:
patent: 4074304 (1978-02-01), Shiba
patent: 4151020 (1979-04-01), McElroy
patent: 4151021 (1979-04-01), McElroy
patent: 4184207 (1980-01-01), McElroy
patent: 4202044 (1980-05-01), Beilstein, Jr. et al.
patent: 4271421 (1981-06-01), McElroy
patent: 4302766 (1981-11-01), Guterman et al.
patent: 4331968 (1982-05-01), Goeney, Jr. et al.
patent: 4380057 (1983-04-01), Kotecha et al.
patent: 4456971 (1984-06-01), Fukuda et al.
patent: 4462090 (1984-07-01), Iizuka
patent: 4488265 (1984-12-01), Kotecha
patent: 4561004 (1985-12-01), Kuo et al.
patent: 4575925 (1986-03-01), Kanbara et al.
patent: 4583201 (1986-04-01), Bertin et al.
patent: 4616402 (1986-10-01), Mori
patent: 4622656 (1986-11-01), Kamiya et al.
patent: 4652897 (1987-03-01), Okuyama et al.
patent: RE32401 (1987-04-01), Beilstein, Jr. et al.
patent: 4663827 (1987-05-01), Nakahara
patent: 4677736 (1987-07-01), Brown
patent: 4794565 (1988-12-01), Wu et al.
patent: 4803529 (1989-02-01), Masuoka
patent: 4805142 (1989-02-01), Bertin et al.
patent: 4811285 (1989-03-01), Walker et al.
patent: 4811294 (1989-03-01), Kobayashi et al.
patent: 4821236 (1989-04-01), Hayashi et al.
patent: 4862418 (1989-08-01), Cuppens et al.
patent: 4943962 (1990-07-01), Imamiya et al.
patent: 4990979 (1991-02-01), Otto
patent: 4997781 (1991-03-01), Tigelaar
patent: 5011787 (1991-04-01), Jeuch
patent: 5017515 (1991-05-01), Gill
patent: 5028553 (1991-07-01), Esquivel et al.
patent: 5029130 (1991-07-01), Yeh
patent: 5043940 (1991-08-01), Harari
patent: 5045488 (1991-09-01), Yeh
patent: 5057886 (1991-10-01), Riemenschneider et al.
patent: 5067108 (1991-11-01), Jenq
patent: 5070032 (1991-12-01), Yuan et al.
patent: 5081054 (1992-01-01), Wu et al.
patent: 5081056 (1992-01-01), Mazzali et al.
patent: 5095344 (1992-03-01), Harari
patent: 5147816 (1992-09-01), Gill et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5204841 (1993-04-01), Chappell et al.
patent: 5218569 (1993-06-01), Banks
patent: 5225361 (1993-07-01), Kakiuchi et al.
patent: 5247485 (1993-09-01), Ide
patent: 5264384 (1993-11-01), Kaya et al.
patent: 5270979 (1993-12-01), Harari et al.
patent: 5278439 (1994-01-01), Ma et al.
patent: 5279982 (1994-01-01), Crotti
patent: 5280446 (1994-01-01), Ma et al.
patent: 5284784 (1994-02-01), Manley
patent: 5297148 (1994-03-01), Harari et al.
patent: 5313421 (1994-05-01), Guterman et al.
patent: 5315541 (1994-05-01), Harari et al.
patent: 5323355 (1994-06-01), Kato
patent: 5355347 (1994-10-01), Cioaca
patent: 5377147 (1994-12-01), Merchant et al.
patent: 5378643 (1995-01-01), Ajika et al.
patent: 5396468 (1995-03-01), Harari et al.
patent: 5412600 (1995-05-01), Nakajima
patent: 5420060 (1995-05-01), Gill et al.
patent: 5430859 (1995-07-01), Norman et al.
patent: 5434825 (1995-07-01), Harari
patent: 5453955 (1995-09-01), Sakui et al.
patent: 5468663 (1995-11-01), Bertin et al.
patent: 5491657 (1996-02-01), Haddad et al.
patent: 5509134 (1996-04-01), Fandrich et al.
patent: 5541886 (1996-07-01), Hasbun
patent: 5546351 (1996-08-01), Tanaka et al.
patent: 5602987 (1997-02-01), Harari et al.
patent: 5606521 (1997-02-01), Kuo et al.
patent: 5629890 (1997-05-01), Engh
patent: 5629892 (1997-05-01), Tang
patent: 5656840 (1997-08-01), Yang
patent: 5675537 (1997-10-01), Bill et al.
patent: 5687114 (1997-11-01), Khan
patent: 5708285 (1998-01-01), Otani et al.
patent: 5712180 (1998-01-01), Guterman et al.
patent: 5740107 (1998-04-01), Lee
patent: 5745475 (1998-04-01), Ohno et al.
patent: 5754469 (1998-05-01), Hung et al.
patent: 5768287 (1998-06-01), Norman et al.
patent: 5771346 (1998-06-01), Norman et al.
patent: 5776810 (1998-07-01), Guterman et al.
patent: 5818757 (1998-10-01), So et al.
patent: 5847996 (1998-12-01), Guterman et al.
patent: 5867430 (1999-02-01), Chen et al.
patent: 5894437 (1999-04-01), Pellegrini
patent: 5936884 (1999-08-01), Hasbun et al.
patent: 5956742 (1999-09-01), Fandrich et al.
patent: 5999451 (1999-12-01), Lin et al.
patent: 6127843 (2000-10-01), Agrawal et al.
patent: 6222762 (2001-04-01), Guterman et al.
patent: 6275419 (2001-08-01), Guterman et al.
patent: 6317363 (2001-11-01), Guterman et al.
patent: 6317364 (2001-11-01), Guterman et al.
patent: 6580638 (2003-06-01), Conley et al.
patent: 0373830 (1990-06-01), None
patent: 0725403 (1996-08-01), None
patent: 6-1181168 (1986-08-01), None
patent: 1-304784 (1989-12-01), None
patent: 2-360 (1990-01-01), None
patent: 7287984 (1995-01-01), None
patent: WO 9012400 (1990-10-01), None
patent: WO 9722123 (1997-06-01), None
K. Naruke et al., “A New Flash-Erase EEPROM Cell with A Sidewall Select-Gate On Its Source Side”, IEDM 89-603, IEEE (1989), pp. 603-606.
M. Kamiya et al., “EPROM Cell with High Gate Injection Efficiency”, IEDM 82-741, IEEE (1982), p. 741-744.
J. Van Houdt, et al., “A 5-Volt-Only Fast-Programmable Flash EEPROM Cell with A Double Polysilicon Split-Gate Structure”, Interuniversity Microelectronics Center (Feb. 1991).
Yale Ma, et al. “A Dual-bit Split-Gate EEPROM (DSG) Cell in Contactless Array for Single-Vcc High Density Flash Memories”, IEDM 94-57, IEEE (1994), pp. 57-60.
G.S. Alberts et al., “Multi-Bit Storage FET EAROM Cell”, G.S. IBM Technical Disclosure Bulletin, vol. 24, No. 7A (Dec.1981), pp. 3311-3314.
Takeshi Nakayama, “A 5-V-only One-Transistor 256K EEPROM with Page-Mode Erase”, IEEE (Aug. 1989), vol. 24, No. 4, pp. 911-915.
Mike McConnell, et al., “An Experimental 4-Mb Flash EEPROM with Sector Erase”, IEEE (Apr. 1991), vol. 26, No. 4, pp. 484-489.
Masaki Momodomi, et al., “A-4-Mb Flash EEPROM with Tight Programmed V.sub.t Distribution”, IEEE (Apr. 1991), vol. 26, No. 4, pp. 492-495.
Fujio Masuoka, et al., “A 256-kbit Flash E.sup.2 PROM Using Triple-Polysilicon Technology”, IEEE (Aug. 1987).
Dumitru Cioaca, et al., “A Million-Cycle 256K EEPROM”, IEEE (Oct. 1987), vol. SC-22, No. 5, pp. 684-692.
Cristiano Calligaro, et al., “A New Serial Sensing Approach for Multistorage Non-Volatile Memories”, IEEE (1995), pp. 21-26.
Min-hwa Chi, et al., “Multi-level Flash/EPROM Memories: New Self-convergent Programming Methods for Low-voltage Applications”, IEDM 95-271, IEEE (1995), pp. 271-274.

Affiliated with

Also associated with

Rating

Multi-state memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-state memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-state memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3481626