Method and apparatus for implementing a high-speed dynamic line

Details Method and apparatus for implementing a high-speed dynamic line Method and apparatus for implementing a high-speed dynamic line

1994-01-12

1997-02-11

Nelms, David C.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

3652335, 365 49, 365202, G11C 800

Patent

active

056027958

ABSTRACT:
A high speed line driver circuit that drives an output line based on an input line is disclosed. The high speed line driver circuit uses dynamic precharging of the output lines to speed the transition of the output lines to the proper output voltage level. The high speed line driver circuit precharges the output lines to an equalized voltage level between Vcc and Vss when in a "stand-by" mode. Using an NMOS transistor, the equalized voltage level is Vcc-Vtn where Vtn is the threshold voltage of the NMOS transistor. An edge detection circuit determines when the output lines must be driven. The edge detection circuit normally remains low until a voltage level change on the input line is detected. When a voltage level change occurs, the equalization is turned off and the line driver circuit drives the output lines to the level dictated by the input line.

REFERENCES:
patent: 5325507 (1994-06-01), Freitas et al.
patent: 5418756 (1995-05-01), McClure
patent: 5455802 (1995-10-01), McClure
patent: 5471415 (1995-11-01), McClure

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