Fabrication method for a semiconductor CSP type package

Details Fabrication method for a semiconductor CSP type package Fabrication method for a semiconductor CSP type package

2005-10-18

2005-10-18

Everhart, Caridad (Department: 2891)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

C438S114000

Reexamination Certificate

active

06955944

ABSTRACT:
A first resin coat layer, which electrically insulates LSI pads and first contact electrodes both formed on each of LSI chips separated from one another, is so designed as to extend farther outward from the peripheral edge of the LSI chip, so that the package is made larger than the LSI chip. An intermediate wire layer and some of second contact electrodes are formed on that part of the first resin coat layer which is formed outside the peripheral edge of the LSI chip. CSP pads and CSP bumps are formed on the second contact electrodes, formed on portions outside the peripheral edge of the LSI chip. Therefore, the pitches of those external terminals can be made wider than the narrow layout pitches of the LSI pads laid out adjacent to one another. This can facilitate the interconnection design on an external board and the fabrication of the CSP type package.

REFERENCES:
patent: 6534386 (2003-03-01), Irie
patent: 2002/0028525 (2002-03-01), Sakamoto et al.
patent: 2001-15650 (2001-01-01), None

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