Selective area solder placement

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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Details

C174S262000, C174S265000, C361S779000, C228S056300

Reexamination Certificate

active

06933449

ABSTRACT:
A printed circuit board having at least one layer of conductive traces on an external surface has at least one preformed solder element placed on a conductive trace area of the printed circuit board requiring a greater than standard amount of solder. The at least one preformed solder element is reflowed to form a connection with the layer of printed solder.

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patent: 6179631 (2001-01-01), Downes et al.
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patent: 6273327 (2001-08-01), Murray, Jr. et al.
patent: 6680843 (2004-01-01), Farrow et al.
patent: 05-198932 (1993-08-01), None
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patent: 07-038246 (1995-02-01), None
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patent: 2001-015901 (2001-01-01), None
patent: 2001-237535 (2001-08-01), None
Computer translation of Japanese Patent Publicatin No. 07038246 (admitted prior art submitted by the applicant).
Computer translation of Japaneses Patent Publicatin No. 10244395 (admitted prior art submitted by the applicant).

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