Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-02-22
2005-02-22
Auduong, Gene N. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185170, C365S196000
Reexamination Certificate
active
06859397
ABSTRACT:
A non-volatile semiconductor memory system (or other type of memory system) is programmed in a manner that avoids program disturb. In one embodiment that includes a flash memory system using a NAND architecture, program disturb is avoided by increasing the channel potential of the source side of the NAND string during the programming process. One exemplar implementation includes applying a voltage (e.g. Vdd) to the source contact and turning on the source side select transistor for the NAND sting corresponding to the cell being inhibited. Another implementation includes applying a pre-charging voltage to the unselected word lines of the NAND string corresponding to the cell being inhibited prior to applying the program voltage.
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Chen Jian
Higashitani Masaaki
Li Yan
Lutze Jeffrey W.
Auduong Gene N.
SanDisk Corporation
Vierra Magen Marcus Harmon & DeNiro LLP
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