Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
Reexamination Certificate
2005-10-25
2005-10-25
Pan, Daniel H. (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
C712S219000
Reexamination Certificate
active
06959377
ABSTRACT:
A system and method for memory structures for efficient tracking and recycling of physical register assignments are disclosed. The method and system provide the necessary functionality to allow the number of physical registers assigned to incoming instructions to equal the number of physical registers that are returned to the list of free registers each cycle, thereby maintaining a substantially constant number of physical register pointers in the list of free registers. The system and method reduce the size of the memory structures utilized to track the usage of physical registers and the recycling of these registers.
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patent: 6119223 (2000-09-01), Witt
patent: 6266763 (2001-07-01), Witt et al.
Intel Architecture Software Developer's Manual vol. 2: Instruction Set Reference, Intel Corporation, 1997, pp. 1-1, 3-1 to 3-10, 3-17 to 3-20, 3-57 to 3-62, 3-107 to 3-108, 3-241 to 3-244, and 3-448 to 3-451.
Bhiawala Masooma
Gold Spencer M.
Lahive & Cockfield LLP
Pan Daniel H.
Sun Microsystems Inc.
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