Method and apparatus for designing a circuit by analyzing select

Details Method and apparatus for designing a circuit by analyzing select Method and apparatus for designing a circuit by analyzing select

1995-10-31

1998-01-27

Teska, Kevin J.

Boots, shoes, and leggings

G06F 1750

Patent

active

057127913

ABSTRACT:
The disclosed method of designing a circuit includes the step of building a dependency graph for a set of computer program instructions. A set of artificial dependencies are inserted into the dependency graph to form a modified dependency graph. The artificial dependencies are hardware limitations such as register renaming limitations, branch prediction limitations, and memory disambiguation limitations. The execution performance of selected artificial dependencies of the modified dependency graph are then analyzed to generate a set of performance values. The top-ranked performance value is associated with a modified dependency graph with a selected set of hardware dependencies. A circuit specification corresponding to the modified dependency graph with the selected set of hardware dependencies is then used to fabricate a circuit.

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Austin, et al. "Dynamic Dependency Analysis of Ordinary Programs", Proceedings of the 19th Annual International Symposium on Computer Architecture, May, 1992. no page numbers.
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Chen et al., "Generating the Optimal Graph Representations from the Instruction Set Tables of Circuits," IEEE 1994 Custom IC Conference, pp. 241-244.
Girkar et al., "Automatic Extraction of Functional Parralism from Ordinary Programs," IEEE Trans. on Parallel & Distributed Systems, vol. 3, No. 2, 1992, pp. 166-178.
Jovanovic, "Software Pipelining of Loops by Pipelining Strongly Connected Components," 1991 Annual Hawai Int'l System Sciences Conference, pp. 351-365.

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