Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2005-02-15
2005-02-15
Weiss, Howard (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S072000, C349S042000
Reexamination Certificate
active
06855955
ABSTRACT:
A gate wire including a plurality of gate lines, a plurality of gate pads125connected to one ends of the gate lines, and a plurality of gate electrodes123connected to the gate lines, and a storage wire for receiving a common voltage are formed on the substrate. A semiconductor layer and an ohmic contact layer are formed on the gate insulating layer covering the gate wire and the storage wire. A data wire including a plurality of data lines defining a plurality of pixel areas along with the gate lines, a plurality of source electrodes extending onto the semiconductor layer, and a plurality of drain electrodes separated from the source electrodes and opposite the source electrodes with respect to the gate lines is formed thereon. A plurality of storage capacitor conductors overlapping the storage wire to form storage capacitance are formed on the gate insulating layer. The storage capacitor conductors include a plurality of repairing portions extended therefrom and overlapping the gate lines. A passivation layer is formed on the data wire and portions of the semiconductor layer which are not covered with the data wire, and a plurality of pixel electrodes connected to the drain electrodes and the storage capacitor conductors through a plurality of contact holes provide at the passivation layer are formed on the passivation layer.
REFERENCES:
patent: 5042916 (1991-08-01), Ukai et al.
patent: 5929489 (1999-07-01), Deane
patent: 6326641 (2001-12-01), Choi
patent: 6341002 (2002-01-01), Shimizu et al.
patent: 6590226 (2003-07-01), Kong et al.
patent: 6714267 (2004-03-01), Choi et al.
patent: 20020130324 (2002-09-01), Song et al.
Jeon Jin
Lee Won-Kyu
F. Chau & Associates LLC
Weiss Howard
LandOfFree
Thin film transistor array panel does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Thin film transistor array panel, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thin film transistor array panel will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3462984