Fishing – trapping – and vermin destroying
Patent
1988-09-27
1990-04-24
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437225, 437228, 437235, 437238, 437247, 427 96, 427 99, 427 38, 427 39, H01L 2100, H01L 2102, H01L 21285, H01L 2190
Patent
active
049200771
ABSTRACT:
A method is disclosed wherein monolythic integrated circuit undergo a so-called aluminum annealing process step and so-called passivation step carried out within a deposition reactor of the PECVD type at a temperature of 420.degree. to 450.degree. C. and a pressure of 1 to 1.5 Torr. Applications of this method results in an increased electrical yield of the circuits produced and a reduction of their manufacturing costs.
REFERENCES:
patent: 4380115 (1983-04-01), Pomante
Wolf, S., Silicon Processing for the VLSI Era, Chap. 6, Lattice Press, 1986.
Sze, S., VLSI Technology, Chap. 3, McGraw--Hill, 1983.
Ghandhi, S., VLSI Fabrication Principles, Chapters 8 & 11, Wiley & Sons, 1983.
Opredkar, R., Influence of an Insulating Film on Plasma Silicon Dioxide Deposition Rates, J. Electrochem. Soc., Solid--State Sci. & Tech., 133(1986), Jul., No. 7, pp. 1431-1432.
Everhart B.
Hearn Brian E.
SGS--Thomson Microelectronics S.r.l.
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