Non-volatile memory erase circuitry

Details Non-volatile memory erase circuitry Non-volatile memory erase circuitry

2005-08-23

2005-08-23

Ho, Hoai (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185190, C365S185280, C365S185290

Reexamination Certificate

active

06934188

ABSTRACT:
A non-volatile memory device includes floating gate memory cells, a pulse counter and voltage pump control circuitry. The control circuitry selectively activates pumps in response to a count output of the counter. In one embodiment, the pump output current is increased as the counter output increases. The memory allows for erase operations that reduce leakage current during initiation of an erase operation.

REFERENCES:
patent: 4752699 (1988-06-01), Cranford, Jr. et al.
patent: 5463588 (1995-10-01), Chonan
patent: 5801987 (1998-09-01), Dinh
patent: 6385093 (2002-05-01), Bautista, Jr. et al.

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