Multi-substrate layer semiconductor packages and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S712000, C257S706000, C257S778000, C361S736000, C361S711000

Reexamination Certificate

active

06933603

ABSTRACT:
A device, comprising a first substrate having a transmission line formed on a surface thereof and a second substrate connected to the first substrate and the transmission line such that the transmission line is substantially between the first substrate and the second substrate. The device also includes a circuit chip connected to the transmission line.

REFERENCES:
patent: 4309677 (1982-01-01), Goldman
patent: 5065123 (1991-11-01), Heckaman et al.
patent: 5311059 (1994-05-01), Banerji et al.
patent: 5355283 (1994-10-01), Marrs et al.
patent: 5404273 (1995-04-01), Akagawa
patent: 5528203 (1996-06-01), Mohwinkel et al.
patent: 5561085 (1996-10-01), Gorowitz et al.
patent: 5612257 (1997-03-01), Tserng et al.
patent: 5614442 (1997-03-01), Tserng
patent: 5635762 (1997-06-01), Gamand
patent: 5668512 (1997-09-01), Mohwinkel et al.
patent: 5708283 (1998-01-01), Wen et al.
patent: 5760650 (1998-06-01), Faulkner et al.
patent: 5835355 (1998-11-01), Dordi
patent: 5847453 (1998-12-01), Uematsu et al.
patent: 5877560 (1999-03-01), Wen et al.
patent: 5903239 (1999-05-01), Takahashi et al.
patent: 5932926 (1999-08-01), Maruyama et al.
patent: 5945734 (1999-08-01), McKay
patent: 5949140 (1999-09-01), Nishi et al.
patent: 5986506 (1999-11-01), Oga
patent: 5990757 (1999-11-01), Tonomura et al.
patent: 5998817 (1999-12-01), Wen et al.
patent: 6020629 (2000-02-01), Farnworth et al.
patent: 6124636 (2000-09-01), Kusamitsu
patent: 6320543 (2001-11-01), Ohata et al.
patent: 6507110 (2003-01-01), Chai et al.
patent: 6566748 (2003-05-01), Shimizu et al.
patent: 6714113 (2004-03-01), Abadeer et al.
patent: 6731015 (2004-05-01), Wu et al.
patent: 2003/0132529 (2003-07-01), Yeo et al.
patent: 2003/0151133 (2003-08-01), Kinayman et al.
Sakai et al., “A Novel Millimeter-Wave IC on Si Substrate Using Flip-Chip Bonding Technology,”IEICE Trans. Electron, vol. E78-C, No. 8, Aug. 1995, pp. 971-978.
Ohiso et al., “Flip-Chip Bonded 0.85-μm Bottom-Emitting Vertical-Cavity Laser Array on an AlGaAs Substrate,”IEEE Photonics Technology Letters, vol. 8, No. 9, Sep. 1996, pp. 1115-1117.
Krems et al., “Avoiding Cross Talk and Feed Back Effects In Packaging Coplaner Millimeter-Wave Circuits,”1998 IEEE MTT-S Digest, pp. 1091-1094.
Wadsworth et al., “Flip Chip GaAs MMICs for Microwave MCM-D Applications,”Advancing Microelectronics, May/Jun. 1998, pp. 22-25.
Burggraaf, “Chip scale and flip chip: Attractive Solutions,”Solid State Technology, Jul. 1998, pp. 239-246.
Peter, “Solder Flip-Chip and CSP Assembly System,”Chip Scale Review, Jul./Aug. 1999, pp. 58-62.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Multi-substrate layer semiconductor packages and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-substrate layer semiconductor packages and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-substrate layer semiconductor packages and method for... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3458775

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.