Method and apparatus for testing a serial transmitter circuit

Details Method and apparatus for testing a serial transmitter circuit Method and apparatus for testing a serial transmitter circuit

2005-03-08

2005-03-08

Le, Amanda T. (Department: 2634)

Pulse or digital communications

Testing

C375S340000, C375S372000, C714S030000, C714S039000

Reexamination Certificate

active

06865222

ABSTRACT:
An integrated circuit (12) contains a serializing transmitter, including a phase locked loop (31) that supplies seven clocks (41) with different phases to a serializer circuit (32). The serializer circuit accepts 7-bit words at a parallel input (42), and outputs these words serially in an end-to-end manner on a twisted pair (17), as a clock signal. The serializer circuit also accepts 7-bit words on a further parallel input (43), and transmits them serially in an end-to-end manner on a twisted pair (18), as serialized data. The integrated circuit also includes a built-in self-test circuit (33), which can supply test information to the two parallel inputs of the serializer circuit, and which can monitor the two twisted pairs while the serializer circuit operates at high data rates typical of normal operation, in order to detect any errors introduced by the serializer circuit. The self-test circuit produces a single digital output (48) to indicate whether an error has been detected.

REFERENCES:
patent: 5903619 (1999-05-01), Chaisemartin
patent: 5974104 (1999-10-01), Dhara
patent: 6094443 (2000-07-01), Dwork
patent: 6201829 (2001-03-01), Schneider
patent: 6584592 (2003-06-01), Omura et al.

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