Dynamic associative memory device

Static information storage and retrieval – Associative memories – Ferroelectric cell

Reexamination Certificate

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C365S203000

Reexamination Certificate

active

06859377

ABSTRACT:
A dynamic associative memory device comprising memory cells each of that including: a capacitor connected to one of the bit lines through first transmission gate capable of being switched to ON by an activation of a word line, and having a cell plate supplied with a source voltage; at least one second transmission gate provided in series between the bit lines, capable of being switched to ON by a memory node potential at an opposite side of a source voltage supply-side of the capacitor; and a initializing circuit for controlling the memory node potential upon receiving a reset signal so that at least one of the second transmission gates is switched to OFF.

REFERENCES:
patent: 5126968 (1992-06-01), Hamamoto et al.
patent: 5146300 (1992-09-01), Hamamoto et al.
patent: 5319589 (1994-06-01), Yamagata et al.
patent: 6262907 (2001-07-01), Lien et al.
patent: 5-298891 (1993-11-01), None
IEEE J.S.S.C. vol. 27. No. 12, Dec. 1992 pp. 1927, Tadato Yamagata, et al., “A 288-kb Fully Parallel Content Addressable Memory Using a Stacked-Capacitor Cell Structure”.
IEICE Transactions on Electronics, vol. E76-C, No. 11, Nov. 1993, pp. 1657, Tadato Yamagata et al., “A Bitline Control Circuit Scheme and Redundancy Technique for High-Density Dynamic Content Addressable Memories”.
IEICE Transactions on Electronics, vol. E77-C, No. 8, Aug. 1994, pp.1377, Takeshi Hamamoto, et al. “A Flexible Search Managing Circultry for High-Density Dynamic CAMs”.
Proceedings of the IEEE 1991, May 12-15, 1991, “Custom Integrated Circuits Conference”, Town & Country Hotel San Diego, California.

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