Semiconductor memory device having plural sense amplifiers

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S189080, C365S196000

Reexamination Certificate

active

06950341

ABSTRACT:
A semiconductor memory device is disclosed which includes an array of memory cells for storing data depending on whether current pull-in is present or absent or alternatively whether it is large or small, a plurality of sense lines with read data of the memory cell array transferred thereto, a reference sense line for common use in data sensing at the plurality of sense lines while being given a reference voltage for the data sense, and a sense amplifier array having a plurality of sense amplifiers for amplifying a difference voltage between the plurality of sense lines and the reference sense line to thereby determine read data.

REFERENCES:
patent: 5023839 (1991-06-01), Suzuki et al.
patent: 5642308 (1997-06-01), Yoshida
patent: 6404666 (2002-06-01), Uchida
patent: 2000-048585 (2000-02-01), None
patent: 2001-143485 (2001-05-01), None

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