Circuit for generating a data strobe signal used in a double...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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C365S193000, C365S233100

Reexamination Certificate

active

06940321

ABSTRACT:
Provided is a circuit for generating a data strobe signal used in a double data rate (DDR) synchronous semiconductor device. The circuit comprises a first logic unit capable of generating a pull up control signal responsive to first and second clock signals. A second logic unit is capable of generating a pull down signal responsive to the first and second clock signals. A data strobe buffer is capable of generating a data strobe signal responsive to the pull up and pull down control signals, the data strobe signal including a preamble. The first logic unit is capable of generating the preamble responsive to a first pulse of the first clock signal. And the data strobe signal is in a high impedance state responsive to a last pulse of the first clock signal.

REFERENCES:
patent: 6002613 (1999-12-01), Cloud et al.
patent: 6078546 (2000-06-01), Lee
patent: 6198674 (2001-03-01), Kim
patent: 6288971 (2001-09-01), Kim
patent: 6519188 (2003-02-01), Ryoo et al.
patent: 6791888 (2004-09-01), Kang
patent: 173267 (2000-06-01), None
patent: 2003-0027381 (2000-05-01), None
patent: 2000-0043978 (2000-07-01), None
English language abstract of Japanese Publication No. 173267.
English language abstract of Korean Publication No. 2000-0027381.
English language abstract of Korean Publication No. 2000-0043978.

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