Semiconductor memory device which reduces the consumption...

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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C365S185200, C365S189011, C365S194000, C365S205000

Reexamination Certificate

active

06894943

ABSTRACT:
A semiconductor memory device includes a memory bank which is divided into a plurality of memory blocks including a first memory block and a second memory block. A first sense amplifier control unit activates sense amplifiers connected with the first memory block, in response to a first activation signal. A second sense amplifier control unit activates sense amplifiers connected with the second memory block, in response to a second activation signal. A signal control unit outputs the first activation signal and the second activation signal to the first sense amplifier control unit and the second sense amplifier control unit, separately from each other, the signal control unit outputting the second activation signal to the second sense amplifier control unit by delaying the first activation signal by a predetermined time after the outputting of the first activation signal.

REFERENCES:
patent: 4800530 (1989-01-01), Itoh et al.
patent: 6028812 (2000-02-01), Tanaka
patent: 6373777 (2002-04-01), Suzuki
patent: 6584027 (2003-06-01), Shinozaki
patent: 20040085835 (2004-05-01), Ahn et al.
patent: 63-050998 (1988-03-01), None
patent: 07-122065 (1995-05-01), None

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