Method for producing a low resistivity polycide

Details Method for producing a low resistivity polycide Method for producing a low resistivity polycide

1996-07-01

1998-01-27

Chea, Thorl

Fishing, trapping, and vermin destroying

437 24, 437 40, 437 46, 437 93, 437112, 437141, 437192, 437228, 437946, 437968, H01L 21283

Patent

active

057121966

ABSTRACT:
A semiconductor fabrication technique is provided for producing a low resistivity polycide. Polycide resistivity is lowered by minimizing areas where the polycide is unduly thin. By preparing the polysilicon upper surface prior to polycide formation thereon, the polysilicon surface can grow polycide at a uniform rate across the entire polysilicon surface. The polysilicon surface is prepared by either restricting doping atoms at grain boundary locations at the polysilicon surface, or by disrupting the grain boundaries by ion implanting that surface. In either instance, a properly prepared polysilicon surface greatly enhances the conductivity of polycide grown thereon.

REFERENCES:
patent: 4604789 (1986-08-01), Bourassa
patent: 4900257 (1990-02-01), Maeda
patent: 5027185 (1991-06-01), Liauh
patent: 5286668 (1994-02-01), Chou
Wolf, "Silicon Processing For The VLSI Era", Lattice Press, (1986), pp. 301-303.

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