Method of forming shallow trench isolation using deep trench...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S401000, C438S427000, C257S501000, C257S520000

Reexamination Certificate

active

06864151

ABSTRACT:
A method of isolating active areas of a semiconductor workpiece. Deep trenches are formed in a workpiece between adjacent first active areas, and an insulating layer and a semiconductive material are deposited in the deep trenches. The semiconductive material is recessed below a top surface of the workpiece. Shallow trenches are formed in the workpiece between adjacent second active areas, and an insulating material is deposited in the shallow trenches and in the semiconductive material recess. The deep trenches may also be formed between an adjacent first active area and second active area. The first active areas may be high voltage devices, and the second active areas may be low voltage devices. The shallow trench isolation over the recessed semiconductive material in the deep trenches is self-aligned.

REFERENCES:
patent: 4994406 (1991-02-01), Vasquez et al.
patent: 6184107 (2001-02-01), Divakaruni et al.
patent: 6284593 (2001-09-01), Mandelman et al.
patent: 6297127 (2001-10-01), Chen et al.
patent: 6667226 (2003-12-01), Pinto et al.

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