Semiconductor device including MOS field effect transistor...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device

Reexamination Certificate

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C257S351000, C257S371000

Reexamination Certificate

active

06881990

ABSTRACT:
First and second impurity doped regions are formed in a semiconductor substrate. A first gate electrode is formed on the first impurity doped region with a first gate insulation film interposed therebetween. A second gate electrode is formed on the second impurity doped region with a second gate insulation film interposed therebetween. A first sidewall insulation film is formed on either side of the first gate electrode. A second sidewall insulation film has a thickness different from that of the first sidewall insulation film and are formed on either side of the second gate electrode. A third sidewall insulation film is formed on the first sidewall insulation film on the side of the first gate electrode. A fourth sidewall insulation films have a thickness different from that of the third sidewall, insulation film and are formed on the second sidewall insulation film on the side of the second gate electrode.

REFERENCES:
patent: 5994743 (1999-11-01), Masuoka
patent: 6333540 (2001-12-01), Shiozawa et al.
patent: 6387743 (2002-05-01), Shiozawa et al.
patent: 0 932 197 (1999-07-01), None
patent: 10-223772 (1998-08-01), None
patent: 11-220038 (1999-08-01), None
patent: 2001-308318 (2001-11-01), None
K. Ota et al., “Double Offset Implantation Technique for High Performance 80nm CMOSFET with Low Gate Leakage Current”, SEMI Forum 2002, ULSI Technology Seminar, Section 4, pp. 42-47.

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