Method of erasing non-volatile memory data

Details Method of erasing non-volatile memory data Method of erasing non-volatile memory data

2005-01-25

2005-01-25

Yoha, Connie C. (Department: 2818)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185300, C365S185010

Reexamination Certificate

active

06847557

ABSTRACT:
A method of erasing non-volatile memory data. The erasing method includes applying a first voltage to a substrate, applying a second voltage to a control gate and setting both source terminal and drain terminal to a floating state during a first time interval so that F-N tunneling can be utilized to carry out an erasing operation. In a second time interval, the control gate voltage is changed from the first voltage applied to a third voltage. In a third time interval, the substrate voltage is changed from the second voltage to 0 volt to prevent over-erasure of the non-volatile memory. The second voltage and the first voltage are in reverse bias. Similarly, the third voltage and the first voltage are also in reverse bias.

REFERENCES:
patent: 5576992 (1996-11-01), Mehrad
patent: 5856945 (1999-01-01), Lee et al.
patent: 5940325 (1999-08-01), Chang et al.
patent: 6504765 (2003-01-01), Joo

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