Non-volatile memory erase circuitry

Details Non-volatile memory erase circuitry Non-volatile memory erase circuitry

Filed on

2005-04-05

Date issued

2005-04-05

Examiner

Ho, Hoai (Department: 2818)

Patent Class

Static information storage and retrieval

SubClass

Floating gate

SubSubClass

Particular biasing

Other Related Categories

C365S185180, C365S185190, C365S185260, C365S185270

Type

Reexamination Certificate

Status

active

Patent number

06876583

Description

ABSTRACT:
A non-volatile memory device includes floating gate memory cells, a pulse counter and voltage pump control circuitry. The control circuitry selectively activates pumps in response to a count output of the counter. In one embodiment, the pump output current is increased as the counter output increases. The memory allows for erase operations that reduce leakage current during initiation of an erase operation.

REFERENCES:
patent: 4752699 (1988-06-01), Cranford, Jr. et al.
patent: 5463588 (1995-10-01), Chonan
patent: 5801987 (1998-09-01), Dinh
patent: 6385093 (2002-05-01), Bautista, Jr. et al.
patent: 6515909 (2003-02-01), Wooldridge
patent: 6643181 (2003-11-01), Sofer et al.

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