Strained-channel transistor structure with...

Details Strained-channel transistor structure with... Strained-channel transistor structure with...

2005-07-26

2005-07-26

Lee, Hsien-Ming (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Thin active physical layer which is

Heterojunction

C257S019000, C257S192000, C257S616000, C438S285000, C438S282000, C438S289000

Reexamination Certificate

active

06921913

ABSTRACT:
A strained-channel transistor structure with lattice-mismatched zone and fabrication method thereof. The transistor structure includes a substrate having a strained channel region, comprising a first semiconductor material with a first natural lattice constant, in a surface, a gate dielectric layer overlying the strained channel region, a gate electrode overlying the gate dielectric layer, and a source region and drain region oppositely adjacent to the strained channel region, with one or both of the source region and drain region comprising a lattice-mismatched zone comprising a second semiconductor material with a second natural lattice constant different from the first natural lattice constant.

REFERENCES:
patent: 5683934 (1997-11-01), Candelaria
patent: 5714777 (1998-02-01), Ismail et al.
patent: 6190975 (2001-02-01), Kubo et al.
patent: 6437375 (2002-08-01), Beaman
patent: 2002/0123183 (2002-09-01), Fitzgerald
patent: 2003/0057416 (2003-03-01), Currie et al.

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