Method for manufacturing and batch testing semiconductor...

Details Method for manufacturing and batch testing semiconductor... Method for manufacturing and batch testing semiconductor...

Filed on

2005-04-12

Date issued

2005-04-12

Examiner

Tokar, Michael (Department: 2829)

Patent Class

Electricity: measuring and testing

SubClass

Fault detecting in electric circuits and of electric components

SubSubClass

Of individual circuit component or element

Other Related Categories

C324S760020

Type

Reexamination Certificate

Status

active

Patent number

06879169

Description

ABSTRACT:
A semiconductor device test apparatus according to the present invention includes a circuit board103and a film105. A plurality of electrodes103care formed at the circuit board103at positions that face opposite a plurality of electrodes201aat a device to be measured201, whereas bumps105bare formed at the surface of the film105located toward the device to be measured201, at positions that face opposite the plurality of electrodes201aat the device to be measured201and electrodes105care formed at the surface of the film105located toward the circuit board103at positions that face opposite the plurality of electrodes103cat the circuit board103. The bumps105bformed at one surface of the film105and the electrodes105cformed at another surface of the film105are electrically connected with each other via through holes105dto support semiconductor devices having electrodes provided at a fine pitch and to improve durability.

REFERENCES:
patent: 4961052 (1990-10-01), Tada et al.
patent: 5021733 (1991-06-01), Ebihara et al.
patent: 5206181 (1993-04-01), Gross
patent: 5258648 (1993-11-01), Lin
patent: 5279975 (1994-01-01), Devereaux et al.
patent: 5317255 (1994-05-01), Suyama et al.
patent: 5327075 (1994-07-01), Hashinaga et al.
patent: 5414370 (1995-05-01), Hashinaga et al.
patent: 5461327 (1995-10-01), Shibata et al.
patent: 5477160 (1995-12-01), Love
patent: 5517126 (1996-05-01), Yamaguchi
patent: 5532610 (1996-07-01), Tsujide et al.
patent: 5541524 (1996-07-01), Tuckerman et al.
patent: 5557215 (1996-09-01), Saeki et al.
patent: 5563521 (1996-10-01), Crumly
patent: 5597767 (1997-01-01), Mignardi et al.
patent: 5606263 (1997-02-01), Yoshizawa et al.
patent: 5663654 (1997-09-01), Wood et al.
patent: 5672977 (1997-09-01), Yamada
patent: 5821762 (1998-10-01), Hamaguchi et al.
patent: 5896038 (1999-04-01), Budnaitis et al.
patent: 5945834 (1999-08-01), Nakata et al.
patent: 5953214 (1999-09-01), Dranchak et al.
patent: 5986282 (1999-11-01), Seki
patent: 6046598 (2000-04-01), Miyaji et al.
patent: 6232791 (2001-05-01), Jitsumori et al.
patent: 6250933 (2001-06-01), Khoury et al.
patent: 6297658 (2001-10-01), Nakata et al.
patent: 6372528 (2002-04-01), Yamamoto
patent: 6407563 (2002-06-01), Ohtaki
patent: 6440771 (2002-08-01), Pierce
patent: 64001252 (1989-01-01), None
patent: 64-001252 (1989-01-01), None
patent: 07288271 (1995-10-01), None
patent: 09033606 (1997-02-01), None
patent: 10-189670 (1998-07-01), None
patent: 10189670 (1998-07-01), None
patent: 10000208 (1998-09-01), None
patent: 11-17076 (1999-01-01), None
patent: 11017076 (1999-01-01), None
patent: 11017076 (1999-01-01), None

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